1. Technical Field
The present invention relates to a resin-sealed semiconductor device with a semiconductor element mounted thereon, a circuit member for use in the same and a method of manufacturing a resin-sealed semiconductor device.
2. Background Art
Recently, for semiconductor devices, a progress in technique for high integration and miniaturization and a tendency (trend) toward higher performance and reduction in thickness and size of electronic equipment have resulted in an ever-increasing demand for higher integration and function such as typified by ASIC (application-specific IC) of LSI.
Accordingly, a trend of development also in a resin-sealed semiconductor device using a lead frame has progressed from a surface mounting package such as SOJ (small outline J-bend package) and QFP (quad flat package) via a package reduced mainly in thickness such as TSOP (thin small outline package) further to a structure like LOC (lead on chip) for enhancing a chip storage efficiency by means of a three-dimensional package inner structure.
However, a resin-sealed semiconductor device package having increased integration density and function is further demanded to be provided with multiple pins and have a thin and small structure. In the aforementioned conventional package, since lead wires are drawn around in an outer peripheral portion of the semiconductor element, the miniaturization of the package appears to be restricted.
Also, in the TSOP or another small-sized package, the provision of multiple pins appears to be restricted in respect of a drawn-around lead and a pin pitch.